During the past ten years, a shifting trend from single core operation to parallel computation enhances the working efficiency of the single chip. However, the network infrastructure encounters a hard time to catch up with the high performance rate of the parallel system. Therefore, commercial needs in a robust and reliable infrastructure have been increased greatly. One possible solution is to scale up the radix (number of ports) of the infrastructure to for higher performance rate. This project explored several architectures and different radix numbers of the single router from the network infrastructure and examined the designs on various performance metrics including area cost, power consumption, and timing.
Title
Petabit Switch Fabric Design
Published
2016-05-13
Full Collection Name
Electrical Engineering & Computer Sciences Technical Reports
Other Identifiers
EECS-2016-105
Type
Text
Extent
49 p
Archive
The Engineering Library
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