In the second half of this dissertation, I will discuss a new hardware accelerator for difficult combinatorial optimization problems. These problems are abundant in modern society, in the fields of operations research, artificial intelligence, chip design, financial optimization, medicine, and many others. They are difficult in that no algorithm has yet been found that solves them efficiently, but the increasing computational power of digital computers has allowed these problems to be routinely tackled. As conventional computers reach their scaling limits, however, alternative hardware architectures are being explored to accelerate computationally intensive tasks like machine learning and combinatorial optimization. Here, I will discuss the design of a new optimization machine, implemented using a network of coupled analog electrical oscillators. The machine uses an unconventional search mechanism to discover the global minimum of the Ising problem, a difficult problem that maps quickly onto other hard optimization problems. I will present the simulated performance of this machine for moderately sized problems with all-to-all connectivity and discuss its potential to scale to larger problems.