Fast optical-circuit-switches (OCS) having a large number of ports can significantly enhance the performance and the efficiency of modern data centers by actively rearranging network patterns. Commercially available optical switches typically operate with the use of moving mirror arrays. These switches can have port counts exceeding 100x100 and insertion losses lower than a few dBs. However, their switching speeds are typically tens-of-milliseconds which limits their applications in highly dynamic traffic patterns. Moreover, the moving-mirror-based optical switches make use of free-space optics that requires manual assembly and, as a result, the costs are high. Recently, optical switches based on silicon photonics technology have been designed and built. Silicon photonics technology provides an attractive platform for optical switches. In them, light is tightly confined in silicon waveguides due to its high refractive index. The tight confinement allows dense integrations of switch components. By leveraging complementary-metal-oxide-semiconductor (CMOS) fabrication processes, large scale integrated optical circuits can be made at relatively low cost in high volume. Silicon photonic switches with microsecond or nanosecond response times have been demonstrated using thermo-optic effects or electro-optic effects, and silicon photonic switches with integrated CMOS driving circuits have been demonstrated. However, the demonstrations were mostly limited to a small number of ports. This limitation is mainly due to the switch architecture used, which scales port counts by connecting 2x2 switching units serially. In this architecture, switching loss increases rapidly as the number of connected units increases. In this dissertation, I investigate a new architecture for silicon photonic switches that is highly scalable. The architecture is based on a waveguide crossbar having moving waveguide couplers that configure light paths, so that there is only one switching stage for any given light path regardless of port count. As a result, switching loss does not accumulate as port count increases. I compare scaling prospects for this architecture with those of previously designed silicon-photonic-switch architectures. I then investigate three implementations of silicon-photonic-switches that use the proposed architecture.