Program performance can be improved on machines with virtual memory by reorganizing the program's address space. We address the question whether reorganization could benefit programs on machines with instruction caches. We have performed experiments to determine the efficacy of restructuring using simple reordering algorithms and profile data, concluding that performance improvement can be obtained relatively cheaply. Experiments show improvements in miss rates on the order 30% to 50%, and sometimes as high as 50% to 80%, by performing a simple algorithm that relocates only 3% to 8% of the basic blocks of a program.
Title
Code Reorganization for Instruction Caches
Published
1988-10-18
Full Collection Name
Electrical Engineering & Computer Sciences Technical Reports
Other Identifiers
CSD-88-447
Type
Text
Extent
25 p
Archive
The Engineering Library
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