We present a design methodology for realizing VLSI printed circuit board (PCB) designs using Computer Aided Design (CAD) tools on powerful workstations. The workstation and CAD tools allow one to create a gate-level design using TTL parts and interconnecting wires, simulate the functionality and timing of the gate-level design, package the design's TTL parts into PCB parts, place and route the PCB, create manufacturing data, and simulate the design at the board-level. A design example, the VLSI-PLM PC Board being developed at the University of California at Berkeley, is given to illustrate this procedure. The VLSI-PLM PC Board is a processor board for the VLSI-PLM Chip [SRINI], which is a high performance CMOS processor for executing computer programs written in the Prolog language.
Title
A Computer Aided Design Methodology For Printed Circuit Boards
Published
1989-01-01
Full Collection Name
Electrical Engineering & Computer Sciences Technical Reports
Other Identifiers
CSD-89-492
Type
Text
Extent
38 p
Archive
The Engineering Library
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