In a microprocessor project such as the Berkeley Intelligent RAM (IRAM) Project, there needs to be a golden architectural model that is simple, precise, and verifiable. For these reasons, the golden model is written as a computer program so that it can be compared to other models (e.g. RTL or gate-level) in an operational manner. Furthermore, the architectural model is often used for compiler, operating system, and application development, and consequently needs to be very fast. Thus, fast languages such as C++ or even assembly are common choices. In addition to a fast simulation environment, developers need good documentation. In a microprocessor project, the documentation needs to be up-to-date and correct with a high degree of confidence. This paper describes the approach taken in the IRAM project to derive the architectural simulator and architecture manual from a single source. This method disallows many types of inconsistencies between the model and the documentation of the model that can remain undetected in traditional approaches.
Title
Design and Implementation of the IRAM Architecture Manual and Functional Simulator
Published
1998-12-01
Full Collection Name
Electrical Engineering & Computer Sciences Technical Reports
Other Identifiers
CSD-98-1025
Type
Text
Extent
17 p
Archive
The Engineering Library
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