Highlights: We have several new tools on this distribution, as well as enhancements to old tools. Here's an overview of the major tools:
Cifplot: Plots CIF files. It can work with nMOS, CMOS, and other technologies.
Crystal: A timing analyzer that helps the designer find performance problems in his design. This latest version of Crystal (Version 2) supports technologies other than nMOS, and allows the use of a slope model for more accurate estimation of signal delays.
Eqntott: Converts a set of logic equations into a truth table format for input to our PLA optimization and layout tools.
Esim: An event driven logic-level simulator developed at MIT and distributed with their permission. The version on this tape handles CMOS as well as nMOS.
Espresso: A fast new boolean equation minimizer.
Ext2sim: Part of the Magic suite of programs. Used for converting the output of Magic's hierarchical extractor into a form usable by other tools on this tape, such as Esim and Crystal.
Magic: The first release of our new graphical layout editor. Magic has an incremental and hierarchical circuit extractor, an incremental design-rule checker, and a router for wiring up your chip.
Mpack: A new release of the tpack library for generating semi-regular modules. This version is compatible with Magic layout files. These routines allow module generators to generate layouts by assembling tiles (which are small chunks of layout designed with Magic). The end result is a module generator that can generate different styles of modules depending upon what set of tiles is used.
Mpanda: A technology-independent generator of split and folded PLAs built using Mpack. Used in conjunction with Pleasure.
Mpla: A technology-independent generator of ordinary PLAs built using Mpack.
Mquilt: A generator of personalized arrays built using Mpack.
Peg: A tool that compiles a high-level description of a finite state machine into logic equations. These logic equations can be fed into the PLA tools for automatic layout and optimization of the FSM.
Pleasure: Minimizes the area of a PLA by splitting and folding its and and or planes. Used in conjunction with Panda.
Several of the programs on this tape were developed by authors outside of the Computer Science Division. We wish to thank Prof. Alberto Sangiovanni-Vincentelli of Electrical Engineering and his students for allowing us to distribute their PLA optimization tools Espresso and Pleasure. Panda and Eqntott were developed by Prof. Richard Newton and his students, also in Electrical Engineering. Esim, the switch-level simulator, was developed by Chris Terman of MIT. We are grateful for the authors' permission to distribute these tools.