In this report a model of interacting finite state machines is defined. Complexity-theoretic lower bounds on one-step reachability, generalized reachability, language containment, CTL model checking, trace equivalence, and bisimulation equivalence on such structures are established. State minimization is proposed as a mechanism for hierarchical verification. Generalized notions of state equivalence are introduced and minimality of the resulting quotient machines is discussed. Computing complete state equivalence is shown to be intractable and heuristics for computing a weaker equivalences are outlined.
Title
Verifying Interacting Finite State Machines
Published
1993-01-01
Full Collection Name
Electrical Engineering & Computer Sciences Technical Reports
Other Identifiers
ERL-93-52
Type
Text
Extent
26 p
Archive
The Engineering Library
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