Owing to the computational complexity of optimal static scheduling, a number of heuristic methods have been proposed for different scheduling conditions and architecture models. Unfortunately, these methods lack the flexibility necessary to enforce implementation and resource constraints that complicate practical multiprocessor scheduling problems. While it is important to find good solutions quickly, an effective scheduling method must also reliably capture the problem specification and flexibly accommodate diverse constraints and objectives.
This dissertation is an attempt to develop insight into efficient and flexible methods for allocating and scheduling concurrent applications to multiprocessor architectures. We conduct our study in four parts. First, we analyze the nature of the scheduling problems that arise in a realistic exploration framework. Second, we evaluate competitive heuristic, randomized, and exact methods for these scheduling problems. Third, we propose methods based on mathematical and constraint programming for a representative scheduling problem. Though expressiveness and flexibility are advantages of these methods, generic constraint formulations suffer prohibitive run times even on modestly sized problems. To alleviate this difficulty, we advance several strategies to accelerate constraint programming, such as problem decompositions, search guidance through heuristic methods, and tight lower bound computations. The inherent flexibility, coupled with improved run times from a decomposition strategy, posit constraint programming as a powerful tool for multiprocessor scheduling problems. Finally, we present a toolbox of practical scheduling methods, which provide different trade-offs with respect to computational efficiency, quality of results, and flexibility. Our toolbox is composed of heuristic methods, constraint programming formulations, and simulated annealing techniques. These methods are part of an exploration framework for deploying network processing applications on two embedded platforms: Intel IXP network processors and Xilinx FPGA based soft multiprocessors.