Systems are increasingly being constructed from off-the-shelf components acquired through a globally distributed supply chain. There is a rising concern over the trustworthiness of these components, especially when used in mission-critical applications. In this report, we present a systematic framework for automatically deriving high-level functions and structures from the gate-level netlist of a digital circuit. First, we formally define the problem of reverse engineering a bit-level description into the corresponding high-level description of a digital circuit. We then present a portfolio of techniques for solving this problem with judicious use of formal methods.
Title
Formal Methods for Reverse Engineering Gate-Level Netlists
Published
EECS Department, University of California, University of California at Berkeley, Berkeley, California, 2013-12-18
Full Collection Name
Electrical Engineering & Computer Sciences Technical Reports
Other Identifiers
EECS-2013-222
Type
Text
Extent
48 p
Archive
The Engineering Library
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